How to Select Between DRAM vs. DRAM-less SSDs
As the word of data storage and processing evolves with new IoT and 5G applications, so do their design performance needs, leading to the Solid-State Drive’s (SSD’s) enormous popularity.
Legacy SSDs in the early 2000s relied on the Serial Advanced Technology Attachment (SATA) interface protocol, which limited the speed and bandwidth at which storage devices could offload data to a motherboard. Today, most manufacturers have adopted Non-Volatile Memory Express (NVMe), which uses the Peripheral Component Interconnect Express (PCIe) protocol, permitting speeds that far exceed SATA standards. NVMe is quickly becoming the dominant storage interface for advanced industrial-grade SSDs.
SSDs use NAND Flash memory, which is the most expensive yet indispensable component of the device, in addition to Dynamic Random Access Memory (DRAM) as a cache for writing data to the SSD and for storing and recording its data mapping tables; since it is about 100 times faster than NAND flash. To improve performance, save costs, and reduce the adverse impact of DRAM supply/demand constraints, SSD manufacturers contemplate architecture alternatives, including DRAM-less SSDs.
The DRAM on an SSD is used to store data mapping tables, which keeps track of logical blocks and their physical locations in NAND. On DRAM-less SSDs this mapping table is stored in NAND. Since NAND is slower than DRAM, DRAM-less SSDs’ performance may be slower than SSDs with a DRAM cache. However, Virtium’s engineering analysis concludes that SSD performance highly depends on the specific workload.
This article discusses two different types of workloads, Burst Performance and Sustained Performance, and their potential impact on SSD performance.
Virtium encourages you to consider the following Burst Performance and Sustained Performance test data findings of their industrial SSD applications and utilize the expanded NVMe communications platform capabilities to balance higher performance with lower component costs.
Test Data – Burst Performance
Burst performance, as its name implies, is a workload with short bursts of data. This is the highest speed the drive can run for a short period of time. This performance is high, but it is unsustainable over long durations.
Virtium’s tests shows there is minimal difference in burst performance between the SSDs with DRAM, while DRAM-less SSDs are slightly faster in sequential transfer and random read operations. However, DRAM-less SSDs have shown to have marginally slower random write performance.
Since booting is primarily random reads with very little writes, DRAM-less SSDs are highly useful as boot drives.
Figure 1 – Burst performance of DRAM-less SSD (VSFCN1CI1920G-2D0)
Figure 2 – Burst performance of DRAM SSD (VSFAN8CI1920G-V11
Figure 3 – Sustained sequential read performance of DRAM SSD (VSFAN8CI1920G-V11) vs. DRAM-less SSD (VSFCN1CI1920G-2D0)
Figure 4 – Sustained sequential write performance of DRAM SSD (VSFAN8CI1920G-V11) vs. DRAM-less SSD (VSFCN1CI1920G-2D0)
Figure 5 – Sustained random read performance of DRAM SSD (VSFAN8CI1920G-V11) vs. DRAM-less SSD (VSFCN1CI1920G-2D0)
Figure 6 – Sustained random write performance of DRAM SSD (VSFAN8CI1920G-V11) vs. DRAM-less SSD (VSFCN1CI1920G-2D0)
DRAM-less SSDs are an attractive alternative for customers that do not need high-sustained performance over a long operation timeframe. DRAM-less SSDs also provide an effective cost-saving solution and is not susceptible to seasonal DRAM shortages which can unexpectedly increase component pricing and availability of DRAM-enabled SSDs.
Having no built-in DRAM within today’s NVMe SSDs also enables a lower power draw, efficient PCB routing, and better thermal management characteristics.
For customers that want to balance a lower SSD cost structure with higher performance, the Host Memory Buffer (HMB) was enabled. HMB deployment allows DRAM-less SSDs to utilize some of the DRAM attached to the system’s Central Processing Unit (CPU) through the PCIe connection, which significantly improves both costs and performance parameters.