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Testing Capabilities

Our Standard

Virtium provides in-depth test capacity and a broad array of standard and enhanced test capabilities. Our extensive testing experience allows us to prevent manufacturing and component defects to ensure the highest level of product quality. In addition, we also have the capability to customize test flows to meet specific application requirements.

Test Flow Processes

  • Functional Test: 100% of our products are functionally tested after manufacturing.
  • System-level Test: 100% of our SSDs and memory modules are tested on actual customers’ motherboards or on customer-approved motherboards with identical chipsets and setup, and are performed using diagnostic programs at true speeds. System testing is critical to catch defects such as ECC errors that cannot be discovered using standard test systems.
  • Burn-in Test

Depending on application or customer requirements, products during the system-level test noted above are also tested under Temptronic Thermalstream Units for temperatures as low as -45 degrees C, or are tested using an under-temperature oven for a duration of up to 12 hours at 85C ambient.

Virtium’s complete suite of testing also includes

  • Temperature up-screening – helps lower customer costs and shortens lead times by allowing Virtium to replace limited supply or higher cost industrial components with more widely available standard components
  • Four corner test and other qualification level tests including: solder quality, shock and vibration, thermal cycling and HALT/HASS
  • Parametric specification
  • Test During Burn-In (TDBI) – enables Virtium to identify infant mortality by capturing transitory anomalies while operating at elevated temperatures

Virtium’s engineering and quality teams have analyzed the failure modes of DRAM modules and determined that DRAM components with sub-optimal reliability used in memory modules tend to fail during early stages of operation. If a semiconductor fails, it is usually in it first three months of use. As newer DRAMs advance into smaller process geometries, there can be a greater risk for chips that contain “weak” bits (a microscopic defect in an individual cell). This is not enough to cause a DRAM failure outright, but may exhibit a single bit error within weeks after initial field operation begins.

​To further eliminate any potential early failures due to “marginal” DRAM devices and to improve overall reliability of memory product before field operation, Virtium can implement TDBI. Although most DRAM chips undergo a static burn-in at the chip level, TDBI offers a very unique and far more comprehensive testing capability because it provides a 24 hour burn-in test at the module level while dynamically running and checking test patterns as the module is performing under stress conditions. Studies done by various memory manufacturers suggest that using TDBI chambers can reduce early failures up to 90%.